This invention relates to integrated circuits such as programmable logic device integrated circuits, and more particularly, to integrated circuits with configurable dynamic phase alignment circuitry.
Programmable logic devices are a type of integrated circuit that can be programmed by a user to implement a desired custom logic function. In a typical scenario, a logic designer uses computer-aided design tools to design a custom logic circuit. When the design process is complete, the tools generate configuration data. The configuration data is loaded into a programmable logic device to configure the device to perform the functions of the custom logic circuit.
In a typical system, a programmable logic device integrated circuit and other integrated circuits are mounted on a circuit board. The circuit board contains conductive paths that interconnect the integrated circuits. A system may also have paths that interconnect integrated circuits on different boards. Programmable logic devices contain transceiver circuitry for transmitting and receiving data over these communications paths.
Programmable logic device transceiver circuitry includes input and output drivers. The input and output drivers may use differential signaling schemes in which a pair of signals are referenced to each other or single-ended signaling schemes, in which signals are referenced to ground. In high-speed environments, the input and output drivers are generally differential drivers and handle differential signals.
Some programmable logic device architectures rely extensively on complex hardwired transceiver circuitry. For example, programmable logic devices are available that include transceivers with dynamic phase alignment capabilities. These devices use multiphase clocks. Hardwired dynamic phase alignment circuitry is used to select an optimal clock phase for data capture operations.
While hardwired programmable logic device transceivers with dynamic phase alignment capabilities are appropriate for some logic designs, the inclusion of complex transceiver circuitry of this type is not always desired and can add needless overhead. As a result, other programmable logic device architectures forgo complex transceiver circuitry and only support limited transceiver functionality. Devices of this more limited type have transceivers without dynamic phase alignment capabilities. Although these devices use less hardwired circuitry to capture incoming data, the benefits of dynamic phase alignment are lost.
It would therefore be desirable to be able to provide an integrated circuit such as a programmable logic device integrated circuit with configurable dynamic phase alignment circuitry.